1. Field of the Invention
The present invention relates to a test emulator, a test module emulator, and a record medium storing program therein. More particularly, the present invention relates to a test emulator, a test module emulator, and a record medium storing program therein for emulating test apparatuses including a plurality of exchangeable test modules for supplying a test signal to DUTs respectively, and verifying a test environment without using real things such as a DUT or a test module.
2. Description of Related Art
Conventionally, technologies are disclosed in Japanese patent application publications No. 10-320229, No. 2000-267881, No. 2001-51025, No. 2001-134457, and No. 2002-333469, as means for verifying test environment without using real things such as a DUT or a test apparatus.
The Japanese patent application publications No. 10-320229 discloses: each emulator unit for emulating function of each hardware unit of a semiconductor test apparatus; a device emulator for emulating function of DUT; means for collecting data required for execution of a test program from each of the emulator units based on a test program; and an emulator including a device test emulator for generating a test signal in a device emulator based on the collected data, comparing result signals from the device emulator, and storing the result therein.
The Japanese patent application publication No.2000-267881 discloses a semiconductor simulating apparatus for accurately simulating voltage and current which change depending on internal resistance of the DUT.
The Japanese patent application publications No.2001-51025 discloses a program debugging apparatus for a semiconductor test including: tester emulation means for emulating operation of the semiconductor test apparatus; hardware description language simulating means for simulating the DUT based on the hardware description language; and debugging means for debugging the program for the semiconductor test based on the simulating result of the DUT.
The Japanese patent application publications No. 2001-134457 discloses a program debugging apparatus for a semiconductor test for composing data points corresponding to each pin at high speed when emulating operation of the semiconductor test apparatus.
The Japanese patent application publications No. 2002-333469 discloses a program debugging apparatus for a semiconductor test for verifying program for the semiconductor test being composed for a semiconductor device including an analog output terminal.